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• Development of physical compact models for predictive & statistical design.
• Development of suitable parameter extraction techniques without experienced device physics engineer.
• Implementation of the compact models and parameter extraction algorithms in automatic circuit design tools.
• Validation and benchmarking: Compact model evaluation for analog, digital, and RF circuit design- Convergence, CPU time, statistical circuit simulation.
• The straightforward understanding of device physics for circuit designers.
• Education of device & circuit engineer with the knowledge of device physics for a next-generation logic device.
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• Modeling of 1/f noise for Gate-All-Around MOSFET and Tunneling FET
• Characterization of 1/f noise for Gate-All-Around MOSFET and Tunneling FET
• Modeling and Simulation of Random Telegraph Noise
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• Development of Artificial Neuron & Synapse
• Modeling of Neuromorphic Device
• Simulation of Neuromorphic Circuit
• Neuromorphic System Design